
binary-search:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004005e8 <_init>:
  4005e8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4005ec:	910003fd 	mov	x29, sp
  4005f0:	94000046 	bl	400708 <call_weak_fn>
  4005f4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4005f8:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400600 <.plt>:
  400600:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400604:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0xfe78>
  400608:	f947fe11 	ldr	x17, [x16, #4088]
  40060c:	913fe210 	add	x16, x16, #0xff8
  400610:	d61f0220 	br	x17
  400614:	d503201f 	nop
  400618:	d503201f 	nop
  40061c:	d503201f 	nop

0000000000400620 <exit@plt>:
  400620:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400624:	f9400211 	ldr	x17, [x16]
  400628:	91000210 	add	x16, x16, #0x0
  40062c:	d61f0220 	br	x17

0000000000400630 <atoi@plt>:
  400630:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400634:	f9400611 	ldr	x17, [x16, #8]
  400638:	91002210 	add	x16, x16, #0x8
  40063c:	d61f0220 	br	x17

0000000000400640 <malloc@plt>:
  400640:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400644:	f9400a11 	ldr	x17, [x16, #16]
  400648:	91004210 	add	x16, x16, #0x10
  40064c:	d61f0220 	br	x17

0000000000400650 <__libc_start_main@plt>:
  400650:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400654:	f9400e11 	ldr	x17, [x16, #24]
  400658:	91006210 	add	x16, x16, #0x18
  40065c:	d61f0220 	br	x17

0000000000400660 <__gmon_start__@plt>:
  400660:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400664:	f9401211 	ldr	x17, [x16, #32]
  400668:	91008210 	add	x16, x16, #0x20
  40066c:	d61f0220 	br	x17

0000000000400670 <abort@plt>:
  400670:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400674:	f9401611 	ldr	x17, [x16, #40]
  400678:	9100a210 	add	x16, x16, #0x28
  40067c:	d61f0220 	br	x17

0000000000400680 <puts@plt>:
  400680:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400684:	f9401a11 	ldr	x17, [x16, #48]
  400688:	9100c210 	add	x16, x16, #0x30
  40068c:	d61f0220 	br	x17

0000000000400690 <free@plt>:
  400690:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400694:	f9401e11 	ldr	x17, [x16, #56]
  400698:	9100e210 	add	x16, x16, #0x38
  40069c:	d61f0220 	br	x17

00000000004006a0 <printf@plt>:
  4006a0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4006a4:	f9402211 	ldr	x17, [x16, #64]
  4006a8:	91010210 	add	x16, x16, #0x40
  4006ac:	d61f0220 	br	x17

00000000004006b0 <putchar@plt>:
  4006b0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4006b4:	f9402611 	ldr	x17, [x16, #72]
  4006b8:	91012210 	add	x16, x16, #0x48
  4006bc:	d61f0220 	br	x17

Disassembly of section .text:

00000000004006c0 <_start>:
  4006c0:	d280001d 	mov	x29, #0x0                   	// #0
  4006c4:	d280001e 	mov	x30, #0x0                   	// #0
  4006c8:	aa0003e5 	mov	x5, x0
  4006cc:	f94003e1 	ldr	x1, [sp]
  4006d0:	910023e2 	add	x2, sp, #0x8
  4006d4:	910003e6 	mov	x6, sp
  4006d8:	580000c0 	ldr	x0, 4006f0 <_start+0x30>
  4006dc:	580000e3 	ldr	x3, 4006f8 <_start+0x38>
  4006e0:	58000104 	ldr	x4, 400700 <_start+0x40>
  4006e4:	97ffffdb 	bl	400650 <__libc_start_main@plt>
  4006e8:	97ffffe2 	bl	400670 <abort@plt>
  4006ec:	00000000 	.inst	0x00000000 ; undefined
  4006f0:	00400e8c 	.word	0x00400e8c
  4006f4:	00000000 	.word	0x00000000
  4006f8:	00400fd8 	.word	0x00400fd8
  4006fc:	00000000 	.word	0x00000000
  400700:	00401058 	.word	0x00401058
  400704:	00000000 	.word	0x00000000

0000000000400708 <call_weak_fn>:
  400708:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0xfe78>
  40070c:	f947f000 	ldr	x0, [x0, #4064]
  400710:	b4000040 	cbz	x0, 400718 <call_weak_fn+0x10>
  400714:	17ffffd3 	b	400660 <__gmon_start__@plt>
  400718:	d65f03c0 	ret
  40071c:	00000000 	.inst	0x00000000 ; undefined

0000000000400720 <deregister_tm_clones>:
  400720:	d0000080 	adrp	x0, 412000 <exit@GLIBC_2.17>
  400724:	91018000 	add	x0, x0, #0x60
  400728:	d0000081 	adrp	x1, 412000 <exit@GLIBC_2.17>
  40072c:	91018021 	add	x1, x1, #0x60
  400730:	eb00003f 	cmp	x1, x0
  400734:	540000a0 	b.eq	400748 <deregister_tm_clones+0x28>  // b.none
  400738:	b0000001 	adrp	x1, 401000 <__libc_csu_init+0x28>
  40073c:	f9403c21 	ldr	x1, [x1, #120]
  400740:	b4000041 	cbz	x1, 400748 <deregister_tm_clones+0x28>
  400744:	d61f0020 	br	x1
  400748:	d65f03c0 	ret
  40074c:	d503201f 	nop

0000000000400750 <register_tm_clones>:
  400750:	d0000080 	adrp	x0, 412000 <exit@GLIBC_2.17>
  400754:	91018000 	add	x0, x0, #0x60
  400758:	d0000081 	adrp	x1, 412000 <exit@GLIBC_2.17>
  40075c:	91018021 	add	x1, x1, #0x60
  400760:	cb000021 	sub	x1, x1, x0
  400764:	9343fc21 	asr	x1, x1, #3
  400768:	8b41fc21 	add	x1, x1, x1, lsr #63
  40076c:	9341fc21 	asr	x1, x1, #1
  400770:	b40000a1 	cbz	x1, 400784 <register_tm_clones+0x34>
  400774:	b0000002 	adrp	x2, 401000 <__libc_csu_init+0x28>
  400778:	f9404042 	ldr	x2, [x2, #128]
  40077c:	b4000042 	cbz	x2, 400784 <register_tm_clones+0x34>
  400780:	d61f0040 	br	x2
  400784:	d65f03c0 	ret

0000000000400788 <__do_global_dtors_aux>:
  400788:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40078c:	910003fd 	mov	x29, sp
  400790:	f9000bf3 	str	x19, [sp, #16]
  400794:	d0000093 	adrp	x19, 412000 <exit@GLIBC_2.17>
  400798:	39418260 	ldrb	w0, [x19, #96]
  40079c:	35000080 	cbnz	w0, 4007ac <__do_global_dtors_aux+0x24>
  4007a0:	97ffffe0 	bl	400720 <deregister_tm_clones>
  4007a4:	52800020 	mov	w0, #0x1                   	// #1
  4007a8:	39018260 	strb	w0, [x19, #96]
  4007ac:	f9400bf3 	ldr	x19, [sp, #16]
  4007b0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4007b4:	d65f03c0 	ret

00000000004007b8 <frame_dummy>:
  4007b8:	17ffffe6 	b	400750 <register_tm_clones>

00000000004007bc <display>:
  4007bc:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4007c0:	910003fd 	mov	x29, sp
  4007c4:	f9000fa0 	str	x0, [x29, #24]
  4007c8:	b90017a1 	str	w1, [x29, #20]
  4007cc:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  4007d0:	91022000 	add	x0, x0, #0x88
  4007d4:	97ffffb3 	bl	4006a0 <printf@plt>
  4007d8:	b9002fbf 	str	wzr, [x29, #44]
  4007dc:	1400000c 	b	40080c <display+0x50>
  4007e0:	b9802fa0 	ldrsw	x0, [x29, #44]
  4007e4:	d37ef400 	lsl	x0, x0, #2
  4007e8:	f9400fa1 	ldr	x1, [x29, #24]
  4007ec:	8b000020 	add	x0, x1, x0
  4007f0:	b9400001 	ldr	w1, [x0]
  4007f4:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  4007f8:	91026000 	add	x0, x0, #0x98
  4007fc:	97ffffa9 	bl	4006a0 <printf@plt>
  400800:	b9402fa0 	ldr	w0, [x29, #44]
  400804:	11000400 	add	w0, w0, #0x1
  400808:	b9002fa0 	str	w0, [x29, #44]
  40080c:	b9402fa0 	ldr	w0, [x29, #44]
  400810:	7100241f 	cmp	w0, #0x9
  400814:	54fffe6d 	b.le	4007e0 <display+0x24>
  400818:	52800140 	mov	w0, #0xa                   	// #10
  40081c:	97ffffa5 	bl	4006b0 <putchar@plt>
  400820:	d503201f 	nop
  400824:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400828:	d65f03c0 	ret

000000000040082c <display_tree>:
  40082c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400830:	910003fd 	mov	x29, sp
  400834:	f9000fa0 	str	x0, [x29, #24]
  400838:	f9400fa0 	ldr	x0, [x29, #24]
  40083c:	f100001f 	cmp	x0, #0x0
  400840:	540002a0 	b.eq	400894 <display_tree+0x68>  // b.none
  400844:	f9400fa0 	ldr	x0, [x29, #24]
  400848:	f9400400 	ldr	x0, [x0, #8]
  40084c:	f100001f 	cmp	x0, #0x0
  400850:	54000080 	b.eq	400860 <display_tree+0x34>  // b.none
  400854:	f9400fa0 	ldr	x0, [x29, #24]
  400858:	f9400400 	ldr	x0, [x0, #8]
  40085c:	97fffff4 	bl	40082c <display_tree>
  400860:	f9400fa0 	ldr	x0, [x29, #24]
  400864:	b9400001 	ldr	w1, [x0]
  400868:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  40086c:	91026000 	add	x0, x0, #0x98
  400870:	97ffff8c 	bl	4006a0 <printf@plt>
  400874:	f9400fa0 	ldr	x0, [x29, #24]
  400878:	f9400800 	ldr	x0, [x0, #16]
  40087c:	f100001f 	cmp	x0, #0x0
  400880:	540000c0 	b.eq	400898 <display_tree+0x6c>  // b.none
  400884:	f9400fa0 	ldr	x0, [x29, #24]
  400888:	f9400800 	ldr	x0, [x0, #16]
  40088c:	97ffffe8 	bl	40082c <display_tree>
  400890:	14000002 	b	400898 <display_tree+0x6c>
  400894:	d503201f 	nop
  400898:	a8c27bfd 	ldp	x29, x30, [sp], #32
  40089c:	d65f03c0 	ret

00000000004008a0 <search>:
  4008a0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4008a4:	910003fd 	mov	x29, sp
  4008a8:	f9000fa0 	str	x0, [x29, #24]
  4008ac:	b90017a1 	str	w1, [x29, #20]
  4008b0:	f9400fa0 	ldr	x0, [x29, #24]
  4008b4:	b9400000 	ldr	w0, [x0]
  4008b8:	b94017a1 	ldr	w1, [x29, #20]
  4008bc:	6b00003f 	cmp	w1, w0
  4008c0:	54000061 	b.ne	4008cc <search+0x2c>  // b.any
  4008c4:	f9400fa0 	ldr	x0, [x29, #24]
  4008c8:	1400001b 	b	400934 <search+0x94>
  4008cc:	f9400fa0 	ldr	x0, [x29, #24]
  4008d0:	b9400000 	ldr	w0, [x0]
  4008d4:	b94017a1 	ldr	w1, [x29, #20]
  4008d8:	6b00003f 	cmp	w1, w0
  4008dc:	5400018a 	b.ge	40090c <search+0x6c>  // b.tcont
  4008e0:	f9400fa0 	ldr	x0, [x29, #24]
  4008e4:	f9400400 	ldr	x0, [x0, #8]
  4008e8:	f100001f 	cmp	x0, #0x0
  4008ec:	540000c0 	b.eq	400904 <search+0x64>  // b.none
  4008f0:	f9400fa0 	ldr	x0, [x29, #24]
  4008f4:	f9400400 	ldr	x0, [x0, #8]
  4008f8:	b94017a1 	ldr	w1, [x29, #20]
  4008fc:	97ffffe9 	bl	4008a0 <search>
  400900:	1400000d 	b	400934 <search+0x94>
  400904:	d2800000 	mov	x0, #0x0                   	// #0
  400908:	1400000b 	b	400934 <search+0x94>
  40090c:	f9400fa0 	ldr	x0, [x29, #24]
  400910:	f9400800 	ldr	x0, [x0, #16]
  400914:	f100001f 	cmp	x0, #0x0
  400918:	540000c0 	b.eq	400930 <search+0x90>  // b.none
  40091c:	f9400fa0 	ldr	x0, [x29, #24]
  400920:	f9400800 	ldr	x0, [x0, #16]
  400924:	b94017a1 	ldr	w1, [x29, #20]
  400928:	97ffffde 	bl	4008a0 <search>
  40092c:	14000002 	b	400934 <search+0x94>
  400930:	d2800000 	mov	x0, #0x0                   	// #0
  400934:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400938:	d65f03c0 	ret

000000000040093c <search_with_parent>:
  40093c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400940:	910003fd 	mov	x29, sp
  400944:	f90017a0 	str	x0, [x29, #40]
  400948:	f90013a1 	str	x1, [x29, #32]
  40094c:	f9000fa2 	str	x2, [x29, #24]
  400950:	b90017a3 	str	w3, [x29, #20]
  400954:	f94017a0 	ldr	x0, [x29, #40]
  400958:	b9400000 	ldr	w0, [x0]
  40095c:	b94017a1 	ldr	w1, [x29, #20]
  400960:	6b00003f 	cmp	w1, w0
  400964:	54000061 	b.ne	400970 <search_with_parent+0x34>  // b.any
  400968:	f94017a0 	ldr	x0, [x29, #40]
  40096c:	1400002b 	b	400a18 <search_with_parent+0xdc>
  400970:	f94017a0 	ldr	x0, [x29, #40]
  400974:	b9400000 	ldr	w0, [x0]
  400978:	b94017a1 	ldr	w1, [x29, #20]
  40097c:	6b00003f 	cmp	w1, w0
  400980:	5400028a 	b.ge	4009d0 <search_with_parent+0x94>  // b.tcont
  400984:	f94017a0 	ldr	x0, [x29, #40]
  400988:	f9400400 	ldr	x0, [x0, #8]
  40098c:	f100001f 	cmp	x0, #0x0
  400990:	540001c0 	b.eq	4009c8 <search_with_parent+0x8c>  // b.none
  400994:	f9400fa0 	ldr	x0, [x29, #24]
  400998:	52800021 	mov	w1, #0x1                   	// #1
  40099c:	b9000001 	str	w1, [x0]
  4009a0:	f94013a0 	ldr	x0, [x29, #32]
  4009a4:	f94017a1 	ldr	x1, [x29, #40]
  4009a8:	f9000001 	str	x1, [x0]
  4009ac:	f94017a0 	ldr	x0, [x29, #40]
  4009b0:	f9400400 	ldr	x0, [x0, #8]
  4009b4:	b94017a3 	ldr	w3, [x29, #20]
  4009b8:	f9400fa2 	ldr	x2, [x29, #24]
  4009bc:	f94013a1 	ldr	x1, [x29, #32]
  4009c0:	97ffffdf 	bl	40093c <search_with_parent>
  4009c4:	14000015 	b	400a18 <search_with_parent+0xdc>
  4009c8:	d2800000 	mov	x0, #0x0                   	// #0
  4009cc:	14000013 	b	400a18 <search_with_parent+0xdc>
  4009d0:	f94017a0 	ldr	x0, [x29, #40]
  4009d4:	f9400800 	ldr	x0, [x0, #16]
  4009d8:	f100001f 	cmp	x0, #0x0
  4009dc:	540001c0 	b.eq	400a14 <search_with_parent+0xd8>  // b.none
  4009e0:	f9400fa0 	ldr	x0, [x29, #24]
  4009e4:	52800041 	mov	w1, #0x2                   	// #2
  4009e8:	b9000001 	str	w1, [x0]
  4009ec:	f94013a0 	ldr	x0, [x29, #32]
  4009f0:	f94017a1 	ldr	x1, [x29, #40]
  4009f4:	f9000001 	str	x1, [x0]
  4009f8:	f94017a0 	ldr	x0, [x29, #40]
  4009fc:	f9400800 	ldr	x0, [x0, #16]
  400a00:	b94017a3 	ldr	w3, [x29, #20]
  400a04:	f9400fa2 	ldr	x2, [x29, #24]
  400a08:	f94013a1 	ldr	x1, [x29, #32]
  400a0c:	97ffffcc 	bl	40093c <search_with_parent>
  400a10:	14000002 	b	400a18 <search_with_parent+0xdc>
  400a14:	d2800000 	mov	x0, #0x0                   	// #0
  400a18:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400a1c:	d65f03c0 	ret

0000000000400a20 <insert>:
  400a20:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400a24:	910003fd 	mov	x29, sp
  400a28:	f9000fa0 	str	x0, [x29, #24]
  400a2c:	f9000ba1 	str	x1, [x29, #16]
  400a30:	f9400ba0 	ldr	x0, [x29, #16]
  400a34:	b9400001 	ldr	w1, [x0]
  400a38:	f9400fa0 	ldr	x0, [x29, #24]
  400a3c:	b9400000 	ldr	w0, [x0]
  400a40:	6b00003f 	cmp	w1, w0
  400a44:	5400014b 	b.lt	400a6c <insert+0x4c>  // b.tstop
  400a48:	f9400fa0 	ldr	x0, [x29, #24]
  400a4c:	f9400800 	ldr	x0, [x0, #16]
  400a50:	f100001f 	cmp	x0, #0x0
  400a54:	540000c0 	b.eq	400a6c <insert+0x4c>  // b.none
  400a58:	f9400fa0 	ldr	x0, [x29, #24]
  400a5c:	f9400800 	ldr	x0, [x0, #16]
  400a60:	f9400ba1 	ldr	x1, [x29, #16]
  400a64:	97ffffef 	bl	400a20 <insert>
  400a68:	1400002a 	b	400b10 <insert+0xf0>
  400a6c:	f9400ba0 	ldr	x0, [x29, #16]
  400a70:	b9400001 	ldr	w1, [x0]
  400a74:	f9400fa0 	ldr	x0, [x29, #24]
  400a78:	b9400000 	ldr	w0, [x0]
  400a7c:	6b00003f 	cmp	w1, w0
  400a80:	5400014a 	b.ge	400aa8 <insert+0x88>  // b.tcont
  400a84:	f9400fa0 	ldr	x0, [x29, #24]
  400a88:	f9400400 	ldr	x0, [x0, #8]
  400a8c:	f100001f 	cmp	x0, #0x0
  400a90:	540000c0 	b.eq	400aa8 <insert+0x88>  // b.none
  400a94:	f9400fa0 	ldr	x0, [x29, #24]
  400a98:	f9400400 	ldr	x0, [x0, #8]
  400a9c:	f9400ba1 	ldr	x1, [x29, #16]
  400aa0:	97ffffe0 	bl	400a20 <insert>
  400aa4:	1400001b 	b	400b10 <insert+0xf0>
  400aa8:	f9400ba0 	ldr	x0, [x29, #16]
  400aac:	b9400001 	ldr	w1, [x0]
  400ab0:	f9400fa0 	ldr	x0, [x29, #24]
  400ab4:	b9400000 	ldr	w0, [x0]
  400ab8:	6b00003f 	cmp	w1, w0
  400abc:	5400010b 	b.lt	400adc <insert+0xbc>  // b.tstop
  400ac0:	f9400fa0 	ldr	x0, [x29, #24]
  400ac4:	f9400800 	ldr	x0, [x0, #16]
  400ac8:	f100001f 	cmp	x0, #0x0
  400acc:	54000081 	b.ne	400adc <insert+0xbc>  // b.any
  400ad0:	f9400fa0 	ldr	x0, [x29, #24]
  400ad4:	f9400ba1 	ldr	x1, [x29, #16]
  400ad8:	f9000801 	str	x1, [x0, #16]
  400adc:	f9400ba0 	ldr	x0, [x29, #16]
  400ae0:	b9400001 	ldr	w1, [x0]
  400ae4:	f9400fa0 	ldr	x0, [x29, #24]
  400ae8:	b9400000 	ldr	w0, [x0]
  400aec:	6b00003f 	cmp	w1, w0
  400af0:	5400010a 	b.ge	400b10 <insert+0xf0>  // b.tcont
  400af4:	f9400fa0 	ldr	x0, [x29, #24]
  400af8:	f9400400 	ldr	x0, [x0, #8]
  400afc:	f100001f 	cmp	x0, #0x0
  400b00:	54000081 	b.ne	400b10 <insert+0xf0>  // b.any
  400b04:	f9400fa0 	ldr	x0, [x29, #24]
  400b08:	f9400ba1 	ldr	x1, [x29, #16]
  400b0c:	f9000401 	str	x1, [x0, #8]
  400b10:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400b14:	d65f03c0 	ret

0000000000400b18 <delete_node>:
  400b18:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400b1c:	910003fd 	mov	x29, sp
  400b20:	f9000fa0 	str	x0, [x29, #24]
  400b24:	b90017a1 	str	w1, [x29, #20]
  400b28:	f9001bbf 	str	xzr, [x29, #48]
  400b2c:	12800000 	mov	w0, #0xffffffff            	// #-1
  400b30:	b9002fa0 	str	w0, [x29, #44]
  400b34:	f9400fa0 	ldr	x0, [x29, #24]
  400b38:	f9400000 	ldr	x0, [x0]
  400b3c:	9100b3a2 	add	x2, x29, #0x2c
  400b40:	9100c3a1 	add	x1, x29, #0x30
  400b44:	b94017a3 	ldr	w3, [x29, #20]
  400b48:	97ffff7d 	bl	40093c <search_with_parent>
  400b4c:	f9001fa0 	str	x0, [x29, #56]
  400b50:	f9401fa0 	ldr	x0, [x29, #56]
  400b54:	f100001f 	cmp	x0, #0x0
  400b58:	540000a1 	b.ne	400b6c <delete_node+0x54>  // b.any
  400b5c:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  400b60:	91028000 	add	x0, x0, #0xa0
  400b64:	97fffec7 	bl	400680 <puts@plt>
  400b68:	14000070 	b	400d28 <delete_node+0x210>
  400b6c:	f9401fa0 	ldr	x0, [x29, #56]
  400b70:	f9400400 	ldr	x0, [x0, #8]
  400b74:	f100001f 	cmp	x0, #0x0
  400b78:	54000281 	b.ne	400bc8 <delete_node+0xb0>  // b.any
  400b7c:	f9401fa0 	ldr	x0, [x29, #56]
  400b80:	f9400800 	ldr	x0, [x0, #16]
  400b84:	f100001f 	cmp	x0, #0x0
  400b88:	54000201 	b.ne	400bc8 <delete_node+0xb0>  // b.any
  400b8c:	f9401ba0 	ldr	x0, [x29, #48]
  400b90:	f100001f 	cmp	x0, #0x0
  400b94:	54000140 	b.eq	400bbc <delete_node+0xa4>  // b.none
  400b98:	b9402fa0 	ldr	w0, [x29, #44]
  400b9c:	7100041f 	cmp	w0, #0x1
  400ba0:	54000081 	b.ne	400bb0 <delete_node+0x98>  // b.any
  400ba4:	f9401ba0 	ldr	x0, [x29, #48]
  400ba8:	f900041f 	str	xzr, [x0, #8]
  400bac:	1400005c 	b	400d1c <delete_node+0x204>
  400bb0:	f9401ba0 	ldr	x0, [x29, #48]
  400bb4:	f900081f 	str	xzr, [x0, #16]
  400bb8:	14000059 	b	400d1c <delete_node+0x204>
  400bbc:	f9400fa0 	ldr	x0, [x29, #24]
  400bc0:	f900001f 	str	xzr, [x0]
  400bc4:	14000056 	b	400d1c <delete_node+0x204>
  400bc8:	f9401fa0 	ldr	x0, [x29, #56]
  400bcc:	f9400400 	ldr	x0, [x0, #8]
  400bd0:	f100001f 	cmp	x0, #0x0
  400bd4:	54000340 	b.eq	400c3c <delete_node+0x124>  // b.none
  400bd8:	f9401fa0 	ldr	x0, [x29, #56]
  400bdc:	f9400800 	ldr	x0, [x0, #16]
  400be0:	f100001f 	cmp	x0, #0x0
  400be4:	540002c1 	b.ne	400c3c <delete_node+0x124>  // b.any
  400be8:	f9401ba0 	ldr	x0, [x29, #48]
  400bec:	f100001f 	cmp	x0, #0x0
  400bf0:	540001c0 	b.eq	400c28 <delete_node+0x110>  // b.none
  400bf4:	b9402fa0 	ldr	w0, [x29, #44]
  400bf8:	7100041f 	cmp	w0, #0x1
  400bfc:	540000c1 	b.ne	400c14 <delete_node+0xfc>  // b.any
  400c00:	f9401ba0 	ldr	x0, [x29, #48]
  400c04:	f9401fa1 	ldr	x1, [x29, #56]
  400c08:	f9400421 	ldr	x1, [x1, #8]
  400c0c:	f9000401 	str	x1, [x0, #8]
  400c10:	14000043 	b	400d1c <delete_node+0x204>
  400c14:	f9401ba0 	ldr	x0, [x29, #48]
  400c18:	f9401fa1 	ldr	x1, [x29, #56]
  400c1c:	f9400421 	ldr	x1, [x1, #8]
  400c20:	f9000801 	str	x1, [x0, #16]
  400c24:	1400003e 	b	400d1c <delete_node+0x204>
  400c28:	f9401fa0 	ldr	x0, [x29, #56]
  400c2c:	f9400401 	ldr	x1, [x0, #8]
  400c30:	f9400fa0 	ldr	x0, [x29, #24]
  400c34:	f9000001 	str	x1, [x0]
  400c38:	14000039 	b	400d1c <delete_node+0x204>
  400c3c:	f9401fa0 	ldr	x0, [x29, #56]
  400c40:	f9400400 	ldr	x0, [x0, #8]
  400c44:	f100001f 	cmp	x0, #0x0
  400c48:	54000341 	b.ne	400cb0 <delete_node+0x198>  // b.any
  400c4c:	f9401fa0 	ldr	x0, [x29, #56]
  400c50:	f9400800 	ldr	x0, [x0, #16]
  400c54:	f100001f 	cmp	x0, #0x0
  400c58:	540002c0 	b.eq	400cb0 <delete_node+0x198>  // b.none
  400c5c:	f9401ba0 	ldr	x0, [x29, #48]
  400c60:	f100001f 	cmp	x0, #0x0
  400c64:	540001c0 	b.eq	400c9c <delete_node+0x184>  // b.none
  400c68:	b9402fa0 	ldr	w0, [x29, #44]
  400c6c:	7100041f 	cmp	w0, #0x1
  400c70:	540000c1 	b.ne	400c88 <delete_node+0x170>  // b.any
  400c74:	f9401ba0 	ldr	x0, [x29, #48]
  400c78:	f9401fa1 	ldr	x1, [x29, #56]
  400c7c:	f9400821 	ldr	x1, [x1, #16]
  400c80:	f9000401 	str	x1, [x0, #8]
  400c84:	14000026 	b	400d1c <delete_node+0x204>
  400c88:	f9401ba0 	ldr	x0, [x29, #48]
  400c8c:	f9401fa1 	ldr	x1, [x29, #56]
  400c90:	f9400821 	ldr	x1, [x1, #16]
  400c94:	f9000801 	str	x1, [x0, #16]
  400c98:	14000021 	b	400d1c <delete_node+0x204>
  400c9c:	f9401fa0 	ldr	x0, [x29, #56]
  400ca0:	f9400801 	ldr	x1, [x0, #16]
  400ca4:	f9400fa0 	ldr	x0, [x29, #24]
  400ca8:	f9000001 	str	x1, [x0]
  400cac:	1400001c 	b	400d1c <delete_node+0x204>
  400cb0:	f9401fa0 	ldr	x0, [x29, #56]
  400cb4:	f9400402 	ldr	x2, [x0, #8]
  400cb8:	f9401fa0 	ldr	x0, [x29, #56]
  400cbc:	f9400800 	ldr	x0, [x0, #16]
  400cc0:	aa0003e1 	mov	x1, x0
  400cc4:	aa0203e0 	mov	x0, x2
  400cc8:	97ffff56 	bl	400a20 <insert>
  400ccc:	f9401ba0 	ldr	x0, [x29, #48]
  400cd0:	f100001f 	cmp	x0, #0x0
  400cd4:	540001c0 	b.eq	400d0c <delete_node+0x1f4>  // b.none
  400cd8:	b9402fa0 	ldr	w0, [x29, #44]
  400cdc:	7100041f 	cmp	w0, #0x1
  400ce0:	540000c1 	b.ne	400cf8 <delete_node+0x1e0>  // b.any
  400ce4:	f9401ba0 	ldr	x0, [x29, #48]
  400ce8:	f9401fa1 	ldr	x1, [x29, #56]
  400cec:	f9400421 	ldr	x1, [x1, #8]
  400cf0:	f9000401 	str	x1, [x0, #8]
  400cf4:	1400000a 	b	400d1c <delete_node+0x204>
  400cf8:	f9401ba0 	ldr	x0, [x29, #48]
  400cfc:	f9401fa1 	ldr	x1, [x29, #56]
  400d00:	f9400421 	ldr	x1, [x1, #8]
  400d04:	f9000801 	str	x1, [x0, #16]
  400d08:	14000005 	b	400d1c <delete_node+0x204>
  400d0c:	f9401fa0 	ldr	x0, [x29, #56]
  400d10:	f9400401 	ldr	x1, [x0, #8]
  400d14:	f9400fa0 	ldr	x0, [x29, #24]
  400d18:	f9000001 	str	x1, [x0]
  400d1c:	f9401fa0 	ldr	x0, [x29, #56]
  400d20:	97fffe5c 	bl	400690 <free@plt>
  400d24:	f9001fbf 	str	xzr, [x29, #56]
  400d28:	d503201f 	nop
  400d2c:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400d30:	d65f03c0 	ret

0000000000400d34 <create>:
  400d34:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400d38:	910003fd 	mov	x29, sp
  400d3c:	f90017a0 	str	x0, [x29, #40]
  400d40:	f90013a1 	str	x1, [x29, #32]
  400d44:	b9001fa2 	str	w2, [x29, #28]
  400d48:	d2800300 	mov	x0, #0x18                  	// #24
  400d4c:	97fffe3d 	bl	400640 <malloc@plt>
  400d50:	aa0003e1 	mov	x1, x0
  400d54:	f94017a0 	ldr	x0, [x29, #40]
  400d58:	f9000001 	str	x1, [x0]
  400d5c:	f94017a0 	ldr	x0, [x29, #40]
  400d60:	f9400000 	ldr	x0, [x0]
  400d64:	f94013a1 	ldr	x1, [x29, #32]
  400d68:	b9400021 	ldr	w1, [x1]
  400d6c:	b9000001 	str	w1, [x0]
  400d70:	f94017a0 	ldr	x0, [x29, #40]
  400d74:	f9400000 	ldr	x0, [x0]
  400d78:	f900041f 	str	xzr, [x0, #8]
  400d7c:	f94017a0 	ldr	x0, [x29, #40]
  400d80:	f9400000 	ldr	x0, [x0]
  400d84:	f900081f 	str	xzr, [x0, #16]
  400d88:	52800020 	mov	w0, #0x1                   	// #1
  400d8c:	b9003fa0 	str	w0, [x29, #60]
  400d90:	14000016 	b	400de8 <create+0xb4>
  400d94:	d2800300 	mov	x0, #0x18                  	// #24
  400d98:	97fffe2a 	bl	400640 <malloc@plt>
  400d9c:	f9001ba0 	str	x0, [x29, #48]
  400da0:	b9803fa0 	ldrsw	x0, [x29, #60]
  400da4:	d37ef400 	lsl	x0, x0, #2
  400da8:	f94013a1 	ldr	x1, [x29, #32]
  400dac:	8b000020 	add	x0, x1, x0
  400db0:	b9400001 	ldr	w1, [x0]
  400db4:	f9401ba0 	ldr	x0, [x29, #48]
  400db8:	b9000001 	str	w1, [x0]
  400dbc:	f9401ba0 	ldr	x0, [x29, #48]
  400dc0:	f900041f 	str	xzr, [x0, #8]
  400dc4:	f9401ba0 	ldr	x0, [x29, #48]
  400dc8:	f900081f 	str	xzr, [x0, #16]
  400dcc:	f94017a0 	ldr	x0, [x29, #40]
  400dd0:	f9400000 	ldr	x0, [x0]
  400dd4:	f9401ba1 	ldr	x1, [x29, #48]
  400dd8:	97ffff12 	bl	400a20 <insert>
  400ddc:	b9403fa0 	ldr	w0, [x29, #60]
  400de0:	11000400 	add	w0, w0, #0x1
  400de4:	b9003fa0 	str	w0, [x29, #60]
  400de8:	b9403fa0 	ldr	w0, [x29, #60]
  400dec:	7100241f 	cmp	w0, #0x9
  400df0:	54fffd2d 	b.le	400d94 <create+0x60>
  400df4:	d503201f 	nop
  400df8:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400dfc:	d65f03c0 	ret

0000000000400e00 <delete_tree>:
  400e00:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400e04:	910003fd 	mov	x29, sp
  400e08:	f9000fa0 	str	x0, [x29, #24]
  400e0c:	f9400fa0 	ldr	x0, [x29, #24]
  400e10:	f100001f 	cmp	x0, #0x0
  400e14:	54000360 	b.eq	400e80 <delete_tree+0x80>  // b.none
  400e18:	f9400fa0 	ldr	x0, [x29, #24]
  400e1c:	f9400400 	ldr	x0, [x0, #8]
  400e20:	f100001f 	cmp	x0, #0x0
  400e24:	54000080 	b.eq	400e34 <delete_tree+0x34>  // b.none
  400e28:	f9400fa0 	ldr	x0, [x29, #24]
  400e2c:	f9400400 	ldr	x0, [x0, #8]
  400e30:	97fffff4 	bl	400e00 <delete_tree>
  400e34:	f9400fa0 	ldr	x0, [x29, #24]
  400e38:	f9400800 	ldr	x0, [x0, #16]
  400e3c:	f100001f 	cmp	x0, #0x0
  400e40:	54000080 	b.eq	400e50 <delete_tree+0x50>  // b.none
  400e44:	f9400fa0 	ldr	x0, [x29, #24]
  400e48:	f9400800 	ldr	x0, [x0, #16]
  400e4c:	97ffffed 	bl	400e00 <delete_tree>
  400e50:	f9400fa0 	ldr	x0, [x29, #24]
  400e54:	f9400400 	ldr	x0, [x0, #8]
  400e58:	f100001f 	cmp	x0, #0x0
  400e5c:	54000141 	b.ne	400e84 <delete_tree+0x84>  // b.any
  400e60:	f9400fa0 	ldr	x0, [x29, #24]
  400e64:	f9400800 	ldr	x0, [x0, #16]
  400e68:	f100001f 	cmp	x0, #0x0
  400e6c:	540000c1 	b.ne	400e84 <delete_tree+0x84>  // b.any
  400e70:	f9400fa0 	ldr	x0, [x29, #24]
  400e74:	97fffe07 	bl	400690 <free@plt>
  400e78:	f9000fbf 	str	xzr, [x29, #24]
  400e7c:	14000002 	b	400e84 <delete_tree+0x84>
  400e80:	d503201f 	nop
  400e84:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400e88:	d65f03c0 	ret

0000000000400e8c <main>:
  400e8c:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  400e90:	910003fd 	mov	x29, sp
  400e94:	b9001fa0 	str	w0, [x29, #28]
  400e98:	f9000ba1 	str	x1, [x29, #16]
  400e9c:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  400ea0:	91058001 	add	x1, x0, #0x160
  400ea4:	9100a3a0 	add	x0, x29, #0x28
  400ea8:	a9400c22 	ldp	x2, x3, [x1]
  400eac:	a9000c02 	stp	x2, x3, [x0]
  400eb0:	a9410c22 	ldp	x2, x3, [x1, #16]
  400eb4:	a9010c02 	stp	x2, x3, [x0, #16]
  400eb8:	f9401021 	ldr	x1, [x1, #32]
  400ebc:	f9001001 	str	x1, [x0, #32]
  400ec0:	b9401fa0 	ldr	w0, [x29, #28]
  400ec4:	7100041f 	cmp	w0, #0x1
  400ec8:	5400010c 	b.gt	400ee8 <main+0x5c>
  400ecc:	f9400ba0 	ldr	x0, [x29, #16]
  400ed0:	f9400001 	ldr	x1, [x0]
  400ed4:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  400ed8:	9102c000 	add	x0, x0, #0xb0
  400edc:	97fffdf1 	bl	4006a0 <printf@plt>
  400ee0:	52800000 	mov	w0, #0x0                   	// #0
  400ee4:	97fffdcf 	bl	400620 <exit@plt>
  400ee8:	9100a3a0 	add	x0, x29, #0x28
  400eec:	52800141 	mov	w1, #0xa                   	// #10
  400ef0:	97fffe33 	bl	4007bc <display>
  400ef4:	f90013bf 	str	xzr, [x29, #32]
  400ef8:	9100a3a1 	add	x1, x29, #0x28
  400efc:	910083a0 	add	x0, x29, #0x20
  400f00:	52800142 	mov	w2, #0xa                   	// #10
  400f04:	97ffff8c 	bl	400d34 <create>
  400f08:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  400f0c:	91032000 	add	x0, x0, #0xc8
  400f10:	97fffddc 	bl	400680 <puts@plt>
  400f14:	f94013a0 	ldr	x0, [x29, #32]
  400f18:	97fffe45 	bl	40082c <display_tree>
  400f1c:	52800140 	mov	w0, #0xa                   	// #10
  400f20:	97fffde4 	bl	4006b0 <putchar@plt>
  400f24:	f9002fbf 	str	xzr, [x29, #88]
  400f28:	f9400ba0 	ldr	x0, [x29, #16]
  400f2c:	91002000 	add	x0, x0, #0x8
  400f30:	f9400000 	ldr	x0, [x0]
  400f34:	97fffdbf 	bl	400630 <atoi@plt>
  400f38:	b90057a0 	str	w0, [x29, #84]
  400f3c:	12800000 	mov	w0, #0xffffffff            	// #-1
  400f40:	b90053a0 	str	w0, [x29, #80]
  400f44:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  400f48:	9103c000 	add	x0, x0, #0xf0
  400f4c:	b94057a1 	ldr	w1, [x29, #84]
  400f50:	97fffdd4 	bl	4006a0 <printf@plt>
  400f54:	f94013a0 	ldr	x0, [x29, #32]
  400f58:	b94057a1 	ldr	w1, [x29, #84]
  400f5c:	97fffe51 	bl	4008a0 <search>
  400f60:	f100001f 	cmp	x0, #0x0
  400f64:	540000a0 	b.eq	400f78 <main+0xec>  // b.none
  400f68:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  400f6c:	91042000 	add	x0, x0, #0x108
  400f70:	97fffdc4 	bl	400680 <puts@plt>
  400f74:	14000004 	b	400f84 <main+0xf8>
  400f78:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  400f7c:	91044000 	add	x0, x0, #0x110
  400f80:	97fffdc0 	bl	400680 <puts@plt>
  400f84:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  400f88:	91048000 	add	x0, x0, #0x120
  400f8c:	b94057a1 	ldr	w1, [x29, #84]
  400f90:	97fffdc4 	bl	4006a0 <printf@plt>
  400f94:	910083a0 	add	x0, x29, #0x20
  400f98:	b94057a1 	ldr	w1, [x29, #84]
  400f9c:	97fffedf 	bl	400b18 <delete_node>
  400fa0:	52800140 	mov	w0, #0xa                   	// #10
  400fa4:	97fffdc3 	bl	4006b0 <putchar@plt>
  400fa8:	b0000000 	adrp	x0, 401000 <__libc_csu_init+0x28>
  400fac:	9104e000 	add	x0, x0, #0x138
  400fb0:	97fffdb4 	bl	400680 <puts@plt>
  400fb4:	f94013a0 	ldr	x0, [x29, #32]
  400fb8:	97fffe1d 	bl	40082c <display_tree>
  400fbc:	52800140 	mov	w0, #0xa                   	// #10
  400fc0:	97fffdbc 	bl	4006b0 <putchar@plt>
  400fc4:	f94013a0 	ldr	x0, [x29, #32]
  400fc8:	97ffff8e 	bl	400e00 <delete_tree>
  400fcc:	52800000 	mov	w0, #0x0                   	// #0
  400fd0:	a8c67bfd 	ldp	x29, x30, [sp], #96
  400fd4:	d65f03c0 	ret

0000000000400fd8 <__libc_csu_init>:
  400fd8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400fdc:	910003fd 	mov	x29, sp
  400fe0:	a901d7f4 	stp	x20, x21, [sp, #24]
  400fe4:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0xfe78>
  400fe8:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0xfe78>
  400fec:	91374294 	add	x20, x20, #0xdd0
  400ff0:	913722b5 	add	x21, x21, #0xdc8
  400ff4:	a902dff6 	stp	x22, x23, [sp, #40]
  400ff8:	cb150294 	sub	x20, x20, x21
  400ffc:	f9001ff8 	str	x24, [sp, #56]
  401000:	2a0003f6 	mov	w22, w0
  401004:	aa0103f7 	mov	x23, x1
  401008:	9343fe94 	asr	x20, x20, #3
  40100c:	aa0203f8 	mov	x24, x2
  401010:	97fffd76 	bl	4005e8 <_init>
  401014:	b4000194 	cbz	x20, 401044 <__libc_csu_init+0x6c>
  401018:	f9000bb3 	str	x19, [x29, #16]
  40101c:	d2800013 	mov	x19, #0x0                   	// #0
  401020:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  401024:	aa1803e2 	mov	x2, x24
  401028:	aa1703e1 	mov	x1, x23
  40102c:	2a1603e0 	mov	w0, w22
  401030:	91000673 	add	x19, x19, #0x1
  401034:	d63f0060 	blr	x3
  401038:	eb13029f 	cmp	x20, x19
  40103c:	54ffff21 	b.ne	401020 <__libc_csu_init+0x48>  // b.any
  401040:	f9400bb3 	ldr	x19, [x29, #16]
  401044:	a941d7f4 	ldp	x20, x21, [sp, #24]
  401048:	a942dff6 	ldp	x22, x23, [sp, #40]
  40104c:	f9401ff8 	ldr	x24, [sp, #56]
  401050:	a8c47bfd 	ldp	x29, x30, [sp], #64
  401054:	d65f03c0 	ret

0000000000401058 <__libc_csu_fini>:
  401058:	d65f03c0 	ret

Disassembly of section .fini:

000000000040105c <_fini>:
  40105c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  401060:	910003fd 	mov	x29, sp
  401064:	a8c17bfd 	ldp	x29, x30, [sp], #16
  401068:	d65f03c0 	ret
